Chevron Left
返回到 Developing FPGA-accelerated cloud applications with SDAccel: Theory

学生对 米兰理工大学 提供的 Developing FPGA-accelerated cloud applications with SDAccel: Theory 的评价和反馈

4.8
73 个评分

课程概述

This course is for anyone passionate in learning how to develop FPGA-accelerated applications with SDAccel! We are entering in an era in which technology progress induces paradigm shifts in computing! As a tradeoff between the two extreme characteristics of GPP and ASIC, we can find a new concept, a new idea of computing... the reconfigurable computing, which has combined the advantages of both the previous worlds. Within this context, we can say that reconfigurable computing will widely, pervasively, and gradually impact human lives. Hence, it is time that we focus on how reconfigurable computing and reconfigurable system design techniques are to be utilised for building applications. One one hand reconfigurable computing can have better performance with respect to a software implementation but paying this in terms of time to implement. On the other hand a reconfigurable device can be used to design a system without requiring the same design time and complexity compared to a full custom solution but being beaten in terms of performance. Within this context, the Xilinx SDx tools, including the SDAccel environment, the SDSoC environment, and Vivado HLS, provide an out-of-the-box experience for system programmers looking to partition elements of a software application to run in an FPGA-based hardware element, and having that hardware work seamlessly with the rest of the application running in a processor or embedded processor. The out-of-the-box experience will provide interesting and, let us say, “good enough” results for many applications. However, this may not be true for you, you may be looking for better performance, data throughput, reduced latency, or to reduce the resources usage... This course is focusing exactly on this. After introducing you to the FPGAs we are going to dig more into the details on how to use Xilinx SDAccel providing you also with working examples on how to optimize the hardware logic to obtain the best of of your hardware implementations. In this case, certain attributes, directives, or pragmas, can be used to direct the compilation and synthesis of the hardware kernel, or to optimise the function of the data mover operating between the processor and the hardware logic. Furthermore, In this course we are going to focus on distributed, heterogeneous infrastructures, presenting how to bring your solutions to life by using the Amazon EC2 F1 instances....

热门审阅

SA

Jul 25, 2020

The content was awesome !. The course was introductory for anyone who has taken embedded systems and introductory FPGA course. I wish it had assignments and projects.

PM

Nov 30, 2020

An amazing course and Instructor. The course provides brief insights about accelerating the Cloud applications using the Xilinx SDAccel tool.

筛选依据:

1 - Developing FPGA-accelerated cloud applications with SDAccel: Theory 的 17 个评论(共 17 个)

创建者 Angel M C

Mar 9, 2021

创建者 Qaiser I

Jul 29, 2020

创建者 syed t a

Jul 26, 2020

创建者 prabhu p

Dec 1, 2020

创建者 tanmay k

Jun 21, 2020

创建者 Ming M

Jan 17, 2020

创建者 CIST N I

Mar 19, 2020

创建者 Muhammad L

Jul 8, 2020

创建者 Avinash S P

Jan 7, 2020

创建者 Satheesh N P

Nov 27, 2019

创建者 Duchstf

Jan 21, 2020

创建者 Sanjaya

Oct 11, 2020

创建者 Meghana (

Feb 8, 2020

创建者 Raghul R

Jun 19, 2020

创建者 Yusef I

Mar 24, 2020

创建者 Sharath

Jul 22, 2019

创建者 Akhil K

Jun 14, 2019